Chip

Chip

male
Somewhat complicated and with more dimensions then I want sometimes. Wild, loyal, kind, fun, a terror, joyful, moody, but always interesting.

Lalith Narayan

 (San Francisco Bay Area, California, United States)
Physical Design/ Applications Engineer with 5 years of Design Implementation and Timing Closure experience and a proven ability to develop new...

Kiran Bulusu

male (San Francisco Bay Area, California, United States)
Field Application Engineer with Masters degree in IC Design and Computer Architecture. Experience with ASIC/FPGA/COT design methodologies and flows...

Khaled Jamal Eddine

 (Japan)
- LSI design related education (Master of Engineering). - Design experience and strong knowledge of EDA tools and flows developed by the world's...

Chintan Purohit

 (San Francisco Bay Area, California, United States)
Proficient in ASIC and FPGA flow (design and functional verification, synthesis, formal verification, and STA)

Pravin Sreeprakash

 (India)
Six years of experience in the field of Low Power VLSI Design, Power and Rail Analysis, Power routing, and other related fields in back-end...

Robert Jones

male
Marketing professional with over 22 years product & services experience in electronic design automation (EDA) & semiconductor industries; over 11...

Surbhi Agarwal

 (Austin, Texas, United States)
- Experience in managing and executing benchmarks for potential customers. Tremendous exposure of various customers, competition tools in industry...

Arpan Sircar

 (India)
Experienced in planning, managing and executing benchmarks at customer sites. Expert in pre-sales and post-sales support for Magma toolset. Lots of...